Divides float32 vectors. The corresponding Intel® AVX instruction is VDIVPS.
m1 |
float32 vector used for the operation |
m2 |
float32 vector also used for the operation |
Performs a SIMD division of eight packed single-precision floating-point elements (float32 elements) in the first source vector, m1 , with eight float32 elements in the second source vector, m2.
Result of the division operation.
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